chipsalliance/chisel

Chisel is a hardware description language that enables users to generate hardware netlists and simulation testbenches through a Scala-based API. The system provides a comprehensive suite of utilities for constructing digital logic, including arithmetic operations, memory structures, and verification layers. It supports cross-compilation for Scala 2 and 3, utilizing macro-based implementations to manage source location tracking, module instantiation, and hierarchical design composition. Additionally, the framework includes a simulation engine for executing generated SystemVerilog and a testing layer for integrating simulation results with standard Scala test frameworks.

This period focused on modernizing the Chisel codebase by migrating the build system to Mill and introducing a new CIRCT-based compilation backend. Significant efforts were made to expand the public API with features like DataViews, the Connectable API, and hierarchical module instantiation, while simultaneously replacing the internal FIRRTL emitter with a ChiselIR-based implementation.

40 changes

This period focused on introducing the svsim library for low-level SystemVerilog simulation and expanding the Property API to support Chisel Classes and Objects. Concurrently, the codebase underwent significant internal refactoring, including the deprecation of legacy FIRRTL APIs and the migration of the build system to Mill.

38 changes

The project focused on enabling Scala 3 support and cross-compilation by replacing the previous veneer pattern with private macro interfaces for core types, utilities, and the hierarchy API. This period also introduced new features such as modular design selection, domain abstractions, and a comprehensive testing infrastructure using Mill and ChiselSim.

50 changes

This period focused on enabling Scala 3 compatibility by splitting interfaces and implementing Scala 2-specific macro and plugin support. The work also introduced a ChiselTest compatibility layer and enhanced debug metadata extraction for both Scala versions.

11 changes

chipsalliance/chisel was measured the same way every project in this corpus was: the same rubric, at a pinned commit, with the result published in full. Point the surveyor at a repository you know and see whether you agree with it.